/****************************************************************************/
/*                                                                          */
/* Module: BIOSLIB.H                                                        */
/*                                                                          */
/* Purpose: Definitions for PCI BIOS Library                                */
/*                                                                          */
/****************************************************************************/

/****************************************************************************/
/*  General Constants                                                       */
/****************************************************************************/

typedef unsigned char byte;     /* 8-bit  */
typedef unsigned short word;    /* 16-bit */
typedef unsigned long dword;    /* 32-bit */

#define CARRY_FLAG 0x01         /* 80x86 Flags Register Carry Flag bit */

#define HIGH_BYTE(ax)    (ax >> 8)
#define LOW_BYTE(ax)     (ax & 0xFF)

/****************************************************************************/
/*   PCI Functions                                                          */
/****************************************************************************/

#define PCI_FUNCTION_ID           0xB1

#define PCI_BIOS_PRESENT          0x01
#define FIND_PCI_DEVICE           0x02
#define FIND_PCI_CLASS_CODE       0x03
#define GENERATE_SPECIAL_CYCLE    0x06
#define READ_CONFIG_BYTE          0x08
#define READ_CONFIG_WORD          0x09
#define READ_CONFIG_DWORD         0x0A
#define WRITE_CONFIG_BYTE         0x0B
#define WRITE_CONFIG_WORD         0x0C
#define WRITE_CONFIG_DWORD        0x0D

/****************************************************************************/
/*   PCI Return Code List                                                   */
/****************************************************************************/

#define SUCCESSFUL               0x00
#define NOT_SUCCESSFUL           0x01
#define FUNC_NOT_SUPPORTED       0x81
#define BAD_VENDOR_ID            0x83
#define DEVICE_NOT_FOUND         0x86
#define BAD_REGISTER_NUMBER      0x87

/****************************************************************************/
/*   PCI Configuration Space Registers                                      */
/****************************************************************************/

#define PCI_CS_VENDOR_ID         0x00
#define PCI_CS_DEVICE_ID         0x02
#define PCI_CS_COMMAND           0x04
#define PCI_CS_STATUS            0x06
#define PCI_CS_REVISION_ID       0x08
#define PCI_CS_CLASS_CODE        0x09
#define PCI_CS_CACHE_LINE_SIZE   0x0C
#define PCI_CS_MASTER_LATENCY    0x0D
#define PCI_CS_HEADER_TYPE       0x0E
#define PCI_CS_BIST              0x0F
#define PCI_CS_BASE_ADDRESS_0    0x10
#define PCI_CS_BASE_ADDRESS_1    0x14
#define PCI_CS_BASE_ADDRESS_2    0x18
#define PCI_CS_BASE_ADDRESS_3    0x1C
#define PCI_CS_BASE_ADDRESS_4    0x20
#define PCI_CS_BASE_ADDRESS_5    0x24
#define PCI_CS_EXPANSION_ROM     0x30
#define PCI_CS_INTERRUPT_LINE    0x3C
#define PCI_CS_INTERRUPT_PIN     0x3D
#define PCI_CS_MIN_GNT           0x3E
#define PCI_CS_MAX_LAT           0x3F

/****************************************************************************/
/*   TPCICommonConfig Type                                                  */
/****************************************************************************/

typedef struct {
    word VendorID;
    word DeviceID;
    word Command;
    word Status;
    byte RevisionID;
    byte ProgIf;
    byte SubClass;
    byte BaseClass;
    byte CacheLineSize;
    byte LatencyTimer;
    byte HeaderType;
    byte BIST;
    dword BaseAddresses[6];
    dword Reserved1[2];
    dword RomBaseAddress;
    dword Reserved2[2];
    byte InterruptLine;
    byte InterruptPin;
    byte MinimumGrant;
    byte MaximumLatency;
    } TPCICommonConfig;

/****************************************************************************/
/*   BIOSLIB Prototypes                                                     */
/****************************************************************************/

int pci_bios_present(byte *hardware_mechanism,
			         word *interface_level_version,
			         byte *last_pci_bus_number);

int find_pci_device(word device_id,
		    word vendor_id,
		    word index,
		    byte *bus_number,
		    byte *device_and_function);

int find_pci_class_code(dword class_code,
		    word index,
		    byte *bus_number,
		    byte *device_and_function);

int generate_special_cycle(byte bus_number,
			   dword special_cycle_data);

int read_pci_config(word device_id,
					word vendor_id,
					word card_index,
					TPCICommonConfig *config);

int read_config_byte(byte bus_number,
			    byte device_and_function,
			    byte register_number,
			    byte *byte_read);

int read_config_word(byte bus_number,
			    byte device_and_function,
			    byte register_number,
			    word *word_read);

int read_config_dword(byte bus_number,
			     byte device_and_function,
			     byte register_number,
			     dword *dword_read);

int write_config_byte(byte bus_number,
			     byte device_and_function,
			     byte register_number,
			     byte byte_to_write);

int write_config_word(byte bus_number,
			     byte device_and_function,
			     byte register_number,
			     word word_to_write);

int write_config_dword(byte bus_number,
			      byte device_and_function,
			      byte register_number,
			      dword dword_to_write);