//#include //#include //#include //#include #include #include #include "Detector.inc" #define TRUE -1 #define FALSE 0 unsigned short BASE16=0xC000, BASE8=0xBC00; unsigned char jumpers; unsigned char adrange; unsigned char dacBrange; unsigned char dacArange; //sbitd takes data and bit, then returns 0x81 or 0x01 based on data[bit] unsigned char sbitd(unsigned int data,unsigned char bit) { return (data & (1< 0xFFF ) count = 0xFFF; else if (count < 0 ) count = 0; outport(DACAddr, count); //Load counts into input register //outport(BASE + 0x08, 0x8000); //Load input register into DAC return double(count)/4096.0L*((DACnum?dacBrange:dacArange)?5.0L:10.0L); //actual V } void EEPROM_Enable(void) { outportb(BASE8+0x0a,0x81);//start bit outportb(BASE8+0x0a,0x01);//Opcode bit 0 (00 = enable/disable) outportb(BASE8+0x0a,0x01);//Opcode bit 1 "" outportb(BASE8+0x0a,0x81);//a5 (must be 1 to enable) outportb(BASE8+0x0a,0x81);//a4 (must be 1 to enable) outportb(BASE8+0x0a,0x01);//a3 (don't care because enable/disable) outportb(BASE8+0x0a,0x01);//a2 (don't care because enable/disable) outportb(BASE8+0x0a,0x01);//a1 (don't care because enable/disable) outportb(BASE8+0x0a,0x01);//a0 (don't care because enable/disable) outportb(BASE8+0x0a,0x00);//end trans } void EEPROM_Disable(void) { outportb(BASE8+0x0a,0x81);//start bit outportb(BASE8+0x0a,0x01);//Opcode bit 0 (00 = enable/disable) outportb(BASE8+0x0a,0x01);//Opcode bit 1 "" outportb(BASE8+0x0a,0x01);//a5 (must be 0 to disable) outportb(BASE8+0x0a,0x01);//a4 (must be 0 to disable) outportb(BASE8+0x0a,0x01);//a3 (don't care because enable/disable) outportb(BASE8+0x0a,0x01);//a2 (don't care because enable/disable) outportb(BASE8+0x0a,0x01);//a1 (don't care because enable/disable) outportb(BASE8+0x0a,0x01);//a0 (don't care because enable/disable) outportb(BASE8+0x0a,0x00);//end trans } void EEPROM_Write(unsigned int addr,unsigned int data) { outportb(BASE8+0x0a,0x81);//Start Bit outportb(BASE8+0x0a,0x01);//Opcode Bit 0 (01=write) outportb(BASE8+0x0a,0x81);//Opcode Bit 1 "" outportb(BASE8+0x0a,sbitd(addr,5));//a5 (address to write to) outportb(BASE8+0x0a,sbitd(addr,4));//a4 outportb(BASE8+0x0a,sbitd(addr,3));//a3 outportb(BASE8+0x0a,sbitd(addr,2));//a2 outportb(BASE8+0x0a,sbitd(addr,1));//a1 outportb(BASE8+0x0a,sbitd(addr,0));//a0 outportb(BASE8+0x0a,sbitd(data,15));//d15 outportb(BASE8+0x0a,sbitd(data,14));//d14 outportb(BASE8+0x0a,sbitd(data,13));//d13 outportb(BASE8+0x0a,sbitd(data,12));//d12 outportb(BASE8+0x0a,sbitd(data,11));//d11 outportb(BASE8+0x0a,sbitd(data,10));//d10 outportb(BASE8+0x0a,sbitd(data,9));//d9 outportb(BASE8+0x0a,sbitd(data,8));//d8 outportb(BASE8+0x0a,sbitd(data,7));//d7 outportb(BASE8+0x0a,sbitd(data,6));//d6 outportb(BASE8+0x0a,sbitd(data,5));//d5 outportb(BASE8+0x0a,sbitd(data,4));//d4 outportb(BASE8+0x0a,sbitd(data,3));//d3 outportb(BASE8+0x0a,sbitd(data,2));//d2 outportb(BASE8+0x0a,sbitd(data,1));//d1 outportb(BASE8+0x0a,sbitd(data,0));//d0 outportb(BASE8+0x0a,0x00);//end trans delay(20); } unsigned int EEPROM_Read(unsigned int addr) { unsigned int data=0; outportb(BASE8+0x0a,0x81);//Start Bit outportb(BASE8+0x0a,0x81);//Opcode Bit 0 (10=Read) outportb(BASE8+0x0a,0x01);//Opcode Bit 1 "" outportb(BASE8+0x0a,sbitd(addr,5));//a5 (address to write to) outportb(BASE8+0x0a,sbitd(addr,4));//a4 outportb(BASE8+0x0a,sbitd(addr,3));//a3 outportb(BASE8+0x0a,sbitd(addr,2));//a2 outportb(BASE8+0x0a,sbitd(addr,1));//a1 outportb(BASE8+0x0a,sbitd(addr,0));//a0 // delay(10); // inportb(BASE+0x0a);//dummy bit data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d15 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d14 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d13 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d12 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d11 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d10 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d9 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d8 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d7 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d6 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d5 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d4 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d3 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d2 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d1 data=(data<<1) | ((inportb(BASE8+0x0a) & 0x80)?1:0);//d0 outportb(BASE8+0x0a,0x00);//end com return data; } void CAL_ADC(unsigned char M,unsigned char B) { //write cal to A/D, offset first, then slope outportb(BASE8+0x0b,0x18);//a1 pot 00 is offset outportb(BASE8+0x0b,0x08);//a0 "" outportb(BASE8+0x0b,sbitda(B,7));//data bit 7 of offset outportb(BASE8+0x0b,sbitda(B,6));//data bit 6 of offset outportb(BASE8+0x0b,sbitda(B,5));//data bit 5 of offset outportb(BASE8+0x0b,sbitda(B,4));//data bit 4 of offset outportb(BASE8+0x0b,sbitda(B,3));//data bit 3 of offset outportb(BASE8+0x0b,sbitda(B,2));//data bit 2 of offset outportb(BASE8+0x0b,sbitda(B,1));//data bit 1 of offset outportb(BASE8+0x0b,sbitda(B,0));//data bit 0 of offset outportb(BASE8+0x0b,0x20);//end trans //write slope now outportb(BASE8+0x0b,0x18);//a1 pot 01 is slope of A/D outportb(BASE8+0x0b,0x88);//a0 pot 01 is slope of A/D outportb(BASE8+0x0b,sbitda(M,7));//data bit 7 of slope outportb(BASE8+0x0b,sbitda(M,6));//data bit 6 of slope outportb(BASE8+0x0b,sbitda(M,5));//data bit 5 of slope outportb(BASE8+0x0b,sbitda(M,4));//data bit 4 of slope outportb(BASE8+0x0b,sbitda(M,3));//data bit 3 of slope outportb(BASE8+0x0b,sbitda(M,2));//data bit 2 of slope outportb(BASE8+0x0b,sbitda(M,1));//data bit 1 of slope outportb(BASE8+0x0b,sbitda(M,0));//data bit 0 of slope outportb(BASE8+0x0b,0x20);//end trans } void CAL_DAC(unsigned char DACNum,unsigned char M) { outportb(BASE8+0x0b,0x03);//just to make sure outportb(BASE8+0x0b,0x01);//a1 pot 00 is slope of DAC0 outportb(BASE8+0x0b,sbitd(DACNum,0));//a0 pot 01 is slope of DAC1 outportb(BASE8+0x0b,sbitd(M,7));//data bit 7 of slope outportb(BASE8+0x0b,sbitd(M,6));//data bit 6 of slope outportb(BASE8+0x0b,sbitd(M,5));//data bit 5 of slope outportb(BASE8+0x0b,sbitd(M,4));//data bit 4 of slope outportb(BASE8+0x0b,sbitd(M,3));//data bit 3 of slope outportb(BASE8+0x0b,sbitd(M,2));//data bit 2 of slope outportb(BASE8+0x0b,sbitd(M,1));//data bit 1 of slope outportb(BASE8+0x0b,sbitd(M,0));//data bit 0 of slope outportb(BASE8+0x0b,0x04);//end trans } void CALWrite(unsigned zAM,unsigned zAB,unsigned zDAM,unsigned zDBM) { EEPROM_Write((adrange+0),zAB); EEPROM_Write((adrange+8),zAM); EEPROM_Write((dacArange+0x10),zDAM); EEPROM_Write((dacBrange+0x12),zDBM); } /* void CAL(void) { unsigned char zDAM, zDBM, zAM, zAB; zAB=EEPROM_Read((adrange+0))&0xff; //byte 0-7 in EEPROM holds "B" for ADC zAM=EEPROM_Read((adrange+8))&0xff; //byte 8-f in EEPROM holds "M" for ADC zDAM=EEPROM_Read((dacArange+0x10))&0xff; //byte x10,x11 in EEPROM holds "M" for DAC0 zDBM=EEPROM_Read((dacBrange+0x12))&0xff; //byte x12,x13 in EEPROM holds "M" for DAC1 CAL_DAC(0,zDAM);//write the calibration value from EEPROM to CAL Pots CAL_DAC(1,zDBM);// "" CAL_ADC(zAM,zAB);// "" } */ void init(void) { jumpers=inportb(BASE8+0x08);//jumper configuration readback adrange=jumpers & 0x07;//d2,d1,d0 are 5/10, uni/bip, 16/8 dacBrange=(jumpers>>3) & 0x01;//d4,d3 are 5/10 for daca,b dacArange=(jumpers>>4) & 0x01; //CAL(); } #define GAIN 0 #define CHANNEL 0 #define STARTCONVERSION (outportb(BASE8+0,0)) #define CHECKFOREOC (!(inportb(BASE+8) & 0x80)) #define WAITFOREOC for(int timer=30000;!CHECKFOREOC && timer;timer--) #define WAITFORDATA for(int timer=30000;!CHECKFOREOC && timer;timer--) #define READADDATA inport(BASE16+0) //#define READADDATA ReadADData() #define CLEARFIFO (outportb(BASE8+0x01, 0)) #define CLEARUNUSEDSTATES (outportb(BASE8+0x03, 0x00), outportb(BASE8 + 0x1D, 0x10), outportb(BASE8+0x1A, 0x11)) /* unsigned short ReadADData(void) { unsigned short Result; Result = inportb(BASE + 0x00); //WAITFORDATA; Result += inportb(BASE + 0x00) * 256; return Result; } */ #define BAV (1024*6) unsigned long Timeouts = 0; double ADReading(int Ch) { unsigned data, Wt = 0, Timeout; unsigned long sumdata = 0L; outportb(BASE8 + 0x02, Ch * 0x11); sumdata=0L; for (int i=0;i LastStep - (StepsComplete == 0xF ? 0 : 1) ) step = 0; break; // Home case 'G': step = 0; break; // End case 'O': step = LastStep - (StepsComplete == 0xF ? 0 : 1); break; } break; case 13: if ( MidCalib ) { if ( step == LastStep ) //Write cal values { CALWrite(CalVal[1], CalVal[0], CalVal[2], CalVal[3]); done = TRUE; } else //Store cal value { CalVal[step] = CurCalVal; StepsComplete |= (1 << step); } MidCalib = FALSE; } else //Begin adjusting cal value { if ( step < LastStep ) { CurCalVal = CalVal[step]; switch(step) { case 0: case 1: CAL_ADC(CalVal[1], CalVal[0]); break; case 2: DAC(0, dacArange ? 4.99 : 9.99); CAL_DAC(0, CalVal[2]); break; case 3: DAC(1, dacBrange ? 4.99 : 9.99); CAL_DAC(1, CalVal[3]); break; } } MidCalib = TRUE; } break; case 27: if ( MidCalib ) MidCalib = FALSE; else done = TRUE; break; } } } EEPROM_Disable(); textattr(0x07); clrscr(); if ( Timeouts ) { cprintf("Warning: there were %ld A/D timeouts during calibration.\r\n\r\n", Timeouts); } cputs("Done.\r\n"); }